Need info or help in poritng Lattice demo on Sipeed TangPriMER FPGA board

Hi All,

I have a demo running properly on Lattice FPGA(LCMX02-4000HE-5TG114C), which I am trying to run Sipeed Tang FPGA board but cant succeed. The problem is with IC mismatch.I tried 2 ways in importing on Tang IDE

  1. By using Project->Transfer option where I get the below error as shown in screenshot below

  2. Is by creating an empty project EGS4 IC type and adding the Verilog files, with following error on Tang Ide
    HDL-8007 ERROR: GSR is a black box
    HDL-8007 ERROR: PUR is a black box
    HDL-8007 ERROR: VLO is a black box
    HDL-8007 ERROR: MUX41 is a black box
    HDL-8007 ERROR: ROM16X1A(initval=16’b0101001111000) is a black box
    HDL-8007 ERROR: ROM16X1A(initval=16’b1111111111111110) is a black box
    HDL-8007 ERROR: FD1P3BX is a black box
    HDL-8007 ERROR: OB is a black box
    HDL-8007 ERROR: OFS1P3DX is a black box
    HDL-8007 ERROR: OBZ is a black box
    HDL-8007 ERROR: ODDRX4B is a black box
    HDL-8007 ERROR: ECLKSYNCA is a black box
    HDL-8007 ERROR: CLKDIVC(DIV=“4.0”) is a black box

I still can confirm its IC mismatch with pins etc,and would like to know if there is any other way or a proper method to manually add part by part files and verify.

Your expert help will be appreciated.Thank you in advance.

Regards

Amit